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Handbook of Multilevel Metallization for Integrated Circuits
Author: Syd R. Wilson
Publisher: William Andrew
Published: 1993
Total Pages: 922
ISBN-13:
DOWNLOAD EBOOK →It is widely recognized that the successful design, development, and integration of multilevel metallization (MLM) systems is and will continue to be key to current and future VLSI technologies. All major semiconductor companies have significant ongoing research teams focused in this area. These teams must view multilevel metallization as a system rather than a collection of isolated process modules.
Silver Metallization
Author: Daniel Adams
Publisher: Springer Science & Business Media
Published: 2007-10-27
Total Pages: 132
ISBN-13: 1848000278
DOWNLOAD EBOOK →Here is the first book to discuss the current understanding of silver metallization and its potential as a future interconnect material for integrated circuit technology. With the lowest resistivity of all metals, silver is an attractive interconnect material for higher current densities and faster switching speeds in integrated circuits. Over the past ten years, extensive research has been conducted to address the issues that have prevented silver from being used as an interconnect metal. The authors provide details on a wide range of experimental, characterization, and analysis techniques. The book is written for students, scientists, engineers, and technologists in the fields of integrated circuits and microelectronics research and development.
VLSI Metallization
Author: Norman G. Einspruch
Publisher: Academic Press
Published: 2014-12-01
Total Pages: 491
ISBN-13: 1483217817
DOWNLOAD EBOOK →VLSI Electronics Microstructure Science, Volume 15: VLSI Metallization discusses the various issues and problems related to VLSI metallization. It details the available solutions and presents emerging trends. This volume is comprised of 10 chapters. The two introductory chapters, Chapter 1 and 2 serve as general references for the electrical and metallurgical properties of thin conducting films. Subsequent chapters review the various aspects of VLSI metallization. The order of presentation has been chosen to follow the common processing sequence. In Chapter 3, some relevant metal deposition techniques are discussed. Chapter 4 presents the methods of VLSI lithography and etching. Conducting films are first deposited at the gate definition step; therefore, the issues related to gate metallization are discussed next in Chapter 5.In Chapter 6, contact metallization is elaborated, and Chapter 7 is devoted to multilevel metallization schemes. Long-time reliability is the subject of Chapter 8, which discusses the issues of contact and interconnect electromigration. GaAs metallization is tackled in Chapter 9. The volume concludes with a general discussion of the functions of interconnect systems in VLSI. Materials scientists, processing and design engineers, and device physicists will find the book very useful.
NASA Technical Note
Device Electronics for Integrated Circuits
Author: Richard S. Muller
Publisher: John Wiley & Sons
Published: 2002-10-28
Total Pages: 564
ISBN-13: 0471593982
DOWNLOAD EBOOK →Focusing specifically on silicon devices, the Third Edition of Device Electronics for Integrated Circuits takes students in integrated-circuits courses from fundamental physics to detailed device operation. Because the book focuses primarily on silicon devices, each topic can include more depth, and extensive worked examples and practice problems ensure that students understand the details.
Metallization Technology for Tenth-micron Range Integrated Circuits. CRADA Final Report for CRADA Number ORNL92-0104
Author:
Publisher:
Published: 1996
Total Pages: 12
ISBN-13:
DOWNLOAD EBOOK →A critical step in the fabrication of integrated circuits is the deposition of metal layers which interconnect the various circuit elements that have been formed in earlier process steps. In particular, columns of metal 2-3 times higher than the characteristic dimension of the circuit are needed. At the time of initiation of this CRADA, the state-of-the-art was the production of 1-1.5 micron-high columns for 0.5 micron-wide features with an expected reduction in size by a factor of two or more within five to ten years. Present commercial technologies cannot deposit such features with the process temperature, aspect ratio (ratio of height to diameter), and/or materials capability needed for future devices. This CRADA had the objective of developing a commercial tool capable of depositing metal (either copper or aluminum) at temperatures below 300°C into features with sizes approaching 0.2 micron on 200-mm wafers. The capability of future modification for deposition of alloys of controllable composition was also an important characteristic. The key technical accomplishments of this CRADA include the development of a system capable of delivering highly ionized metal plasmas, refinement of spectroscopic techniques for in situ monitoring of the ion/neutral ratio, use of these plasmas for filling and lining submicron trenches used for integrated circuit fabrication, and generation of fundamental data on the angular dependent sputtering yield which will prove useful for modeling the time evolution of feature filling and lining.
Microelectronics, I.
III-V Integrated Circuit Fabrication Technology
Author: Shiban Tiku
Publisher: CRC Press
Published: 2016-04-27
Total Pages: 706
ISBN-13: 9814669318
DOWNLOAD EBOOK →GaAs processing has reached a mature stage. New semiconductor compounds are emerging that will dominate future materials and device research, although the processing techniques used for GaAs will still remain relevant. This book covers all aspects of the current state of the art of III-V processing, with emphasis on HBTs. It is aimed at practicing
Metallization Technology for Tenth-micron Range Integrated Circuits
Author:
Publisher:
Published: 1996
Total Pages: 6
ISBN-13:
DOWNLOAD EBOOK →A critical step in the fabrication of integrated circuits is the deposition of metal layers which interconnect the various circuit elements that have been formed in earlier process steps. In particular, columns of copper several times higher than the characteristic dimension of the circuit elements was needed. Features with a diameter of a few tenths of a micron and a height of about one micron need to be filled at rates in the half to one micron per minute range. With the successful development of a copper deposition technology meeting these requirements, integrated circuits with simpler designs and higher performance could be economically manufactured. Several technologies for depositing copper were under development. No single approach had an optimum combination of performance (feature characteristics), cost (deposition rates), and manufacturability (integration with other processes and tool reliability). Chemical vapor deposition, plating, sputtering and ionized-physical vapor deposition (I-PVD) were all candidate technologies. Within this project, the focus was on I-PVD.
