Embedded Processor-Based Self-Test

Embedded Processor-Based Self-Test PDF

Author: Dimitris Gizopoulos

Publisher: Springer Science & Business Media

Published: 2013-03-09

Total Pages: 226

ISBN-13: 1402028016

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Embedded Processor-Based Self-Test is a guide to self-testing strategies for embedded processors. Embedded processors are regularly used today in most System-on-Chips (SoCs). Testing of microprocessors and embedded processors has always been a challenge because most traditional testing techniques fail when applied to them. This is due to the complex sequential structure of processor architectures, which consists of high performance datapath units and sophisticated control logic for performance optimization. Structured Design-for-Testability (DfT) and hardware-based self-testing techniques, which usually have a non-trivial impact on a circuit’s performance, size and power, can not be applied without serious consideration and careful incorporation into the processor design. Embedded Processor-Based Self-Test shows how the powerful embedded functionality that processors offer can be utilized as a self-testing resource. Through a discussion of different strategies the book emphasizes on the emerging area of Software-Based Self-Testing (SBST). SBST is based on the idea of execution of embedded software programs to perform self-testing of the processor itself and its surrounding blocks in the SoC. SBST is a low-cost strategy in terms of overhead (area, speed, power), development effort and test application cost, as it is applied using low-cost, low-speed test equipment. Embedded Processor-Based Self-Test can be used by designers, DfT engineers, test practitioners, researchers and students working on digital testing, and in particular processor and SoC test. This book sets the framework for comparisons among different SBST methodologies by discussing key requirements. It presents successful applications of SBST to a number of embedded processors of different complexities and instruction set architectures.

Arithmetic Built-in Self-test for Embedded Systems

Arithmetic Built-in Self-test for Embedded Systems PDF

Author: Janusz Rajski

Publisher: Prentice Hall

Published: 1998

Total Pages: 298

ISBN-13:

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Arithmetic Built-In Self-Test for Embedded Systems offers a thorough treatment of the important issues in software-based built-in self-test for systems with embedded processors. Fundamental concepts are illustrated with practical scenarios for test generation, test application, and test response compaction. Arithmetic Built-In Self-Test for Embedded Systems uses an approach to cutting-edge technology that will be of interest to hardware and embedded system designers, test and design engineers, and researchers working on IC/core testing. It is also appropriate for graduate-level design courses. An introductory chapter provides a comprehensive tutorial covering the most relevant DFT and BIST techniques.

On-line Error Detection and Fast Recover Techniques for Dependable Embedded Processors

On-line Error Detection and Fast Recover Techniques for Dependable Embedded Processors PDF

Author: Matthias Pflanz

Publisher: Springer

Published: 2003-07-31

Total Pages: 133

ISBN-13: 3540458581

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This book presents a new approach to on-line observation and concurrent checking of processors by refining and improving known techniques and introducing new ideas.The proposed on-line error detection and fast recover techniques support and complement other established methods. In combination with other on-line observation priniciples and with a combined hardware-software test, these techniques are used to fulfill a complete self-check scheme for an embedded processor.

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation PDF

Author: Krishnendu Chakrabarty

Publisher: Springer Science & Business Media

Published: 2013-04-17

Total Pages: 202

ISBN-13: 1475765274

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System-on-a-Chip (SOC) integrated circuits composed of embedded cores are now commonplace. Nevertheless, there remain several roadblocks to rapid and efficient system integration. Test development is seen as a major bottleneck in SOC design and manufacturing capabilities. Testing SOCs is especially challenging in the absence of standardized test structures, test automation tools, and test protocols. In addition, long interconnects, high density, and high-speed designs lead to new types of faults involving crosstalk and signal integrity. SOC (System-on-a-Chip) Testing for Plug and Play Test Automation is an edited work containing thirteen contributions that address various aspects of SOC testing. SOC (System-on-a-Chip) Testing for Plug and Play Test Automation is a valuable reference for researchers and students interested in various aspects of SOC testing.

Processor Design

Processor Design PDF

Author: Jari Nurmi

Publisher: Springer Science & Business Media

Published: 2007-07-26

Total Pages: 534

ISBN-13: 1402055307

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Here is an extremely useful book that provides insight into a number of different flavors of processor architectures and their design, software tool generation, implementation, and verification. After a brief introduction to processor architectures and how processor designers have sometimes failed to deliver what was expected, the authors introduce a generic flow for embedded on-chip processor design and start to explore the vast design space of on-chip processing. The authors cover a number of different types of processor core.

Railway Safety, Reliability, and Security: Technologies and Systems Engineering

Railway Safety, Reliability, and Security: Technologies and Systems Engineering PDF

Author: Flammini, Francesco

Publisher: IGI Global

Published: 2012-05-31

Total Pages: 487

ISBN-13: 146661644X

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Human errors, as well as deliberate sabotage, pose a considerable danger to passengers riding on the modern railways and have created disastrous consequences. To protect civilians against both intentional and unintentional threats, rail transportation has become increasingly automated. Railway Safety, Reliability, and Security: Technologies and Systems Engineering provides engineering students and professionals with a collection of state-of-the-art methodological and technological notions to support the development and certification of ‘real-time safety-critical’ railway control systems, as well as the protection of rail transportation infrastructures.